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Designing robust asynchronous circuit components
2003
IEE Proceedings - Circuits Devices and Systems
Asynchronous circuits require components that display hazard-free operation under normal input conditions. In addition, quasi-delay-insensitive circuits are based on the assumption of isochronic forks, an assumption that can in practice be compromised by threshold variations due to the use of, for example, dynamic or pseudo-dynamic C-gate circuits. In the paper, the authors investigate the severity of these problems in practical circuits. It is shown that threshold variations are much less
doi:10.1049/ip-cds:20030349
fatcat:df6mlus4j5bwxnjmcjiipejvfu