Performance Analysis of Transient Fault-Injection and Fault-Tolerant System for Digital Circuits on FPGA

Sharath Kumar Y N, Dinesha P
2020 International Journal of Advanced Computer Science and Applications  
A Fault-Tolerant System is necessary to improve the reliability of digital circuits with the presence of Fault Injection and also improves the system performance with better Fault Coverage. In this work, an efficient Transient Fault-Injection system (FIS) and Fault-Tolerant System (FTS) are designed for digital circuits. The FIS includes Berlekamp Massey Algorithm (BMA) based LFSRs, with fault logic followed by one -hot-encoder register, which generates the faults. The FTS is designed using
more » ... le-Modular-Redundancy (TMR) and Dual Modular-Redundancy (DMR). The TMR module is designed using the Majority Voter Logic (MVL), and DMR is designed using Self-Voter Logic (SVL) for digital circuits such as synchronous and asynchronous circuits. The four different MVL approaches are designed in the TMR module for digital circuits. The FIS-FTS module is designed on Xilinx-ISE 14.7 environment and implemented on Artix-7 FPGA. The synthesis results include chip area, gate count, delay, and power are analyzed along with fault tolerance, and coverage for given digital circuits. The fault tolerance is analyzed using Modelsim-simulator. The FIS-FTS module covers an average of 99.17% fault coverage for both synchronous and asynchronous circuits. Keywords-Digital circuits; transient fault; fault injection; fault tolerant; triple modular redundancy; dual modular redundancy; majority voter logic; self-voter logic I. INTRODUCTION Designing the electronic system by concerning the reliability and availability features are used in many critical applications like aerospace, military, transportation, and avionics. These electronics systems provide continuous support while performing real-time applications. If any attacks have occurred on these systems, it affected the overall system performance and led to failure. The fault injection is a process for estimating or evaluating the fault-tolerant system. There are many FIS methods are available based on hardware FIS, simulation-based FIS, and emulation based FIS. The hardwarebased FIS injects high Laser beams or ion beams to circuits. The software-based FIS has static and dynamic approaches for analyzing the high computational overheads with high accuracy. The emulation based FIS has hardware reconfiguration, and circuits instrumentations approach. The dependability can tolerate system failures by providing better services, including threats, attributes, and means. Many available attributes include reliability, safety, confidentiality, security, integrity, maintainability, and availability creates dependability in any of the electronics systems. The faults, errors, failures are a chain of threats, which affect the system or component. The means have methods or techniques which include fault tolerance, fault preventions, fault forecasting, and fault removal [1-2]. 109 | P a g e www.ijacsa.thesai.org
doi:10.14569/ijacsa.2020.0110516 fatcat:tyjczfj6sjcztk2er3pjz2zhx4