Software-assisted hardware reliability

Vijay Janapa Reddi, Meeta S. Gupta, Michael D. Smith, Gu-yeon Wei, David Brooks, Simone Campanoni
<span title="">2009</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5vn6yyeefbbxtoo3uhwxwjwtme" style="color: black;">Proceedings of the 46th Annual Design Automation Conference on ZZZ - DAC &#39;09</a> </i> &nbsp;
Power constrained designs are becoming increasingly sensitive to supply voltage noise. We propose a hardware-software collaborative approach to enable aggressive operating margins: a checkpoint-recovery mechanism corrects margin violations, while a run-time software layer reschedules the program's instruction stream to prevent recurring margin crossings at the same program location. The run-time layer removes 60% of these events with minimal overhead, thereby significantly improving overall performance.
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1629911.1630114">doi:10.1145/1629911.1630114</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/dac/ReddiGSWBC09.html">dblp:conf/dac/ReddiGSWBC09</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/2znymncztnaf7nqv4l7m2emu7q">fatcat:2znymncztnaf7nqv4l7m2emu7q</a> </span>
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