If we look into the scaling law carefully, we find that three crises can be stringent in realizing LSI's of the year 2010: namely power crisis, interconnection crisis, and complexity crisis. As for power crisis, there are activities to lower the power consumption from device level, circuit level to system level. Lowering supply voltage (V DD ) is very effective in reducing the power but the threshold voltage (V TH ) should be reduced at the same time for high-speed operation. The low V TH ,

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... ver, increases the leakage current. To overcome this situation, V TH and V DD control through the use of multiple V TH , variable V TH , multiple V DD and variable V DD are intensively pursued and some have been productized. At the system level, a system LSI approach is promising for realizing low power. The new trend is to exploit cooperation of software and hardware. In the sub 1-volt design, watch out for the abnormal temperature dependence of drain current. The interconnection will be determining cost, delay, power, reliability and turn-around time of the future LSI's rather than MOSFET's. RC delay problem can be solved through LSI architecture realizing "the further, the less communication" with the help of local memories. It is just impossible to design LSI's with 100 million transistors from scratch. The complexity issue can only be solved by the sharing and re-use of design data. So-called IP-based design will be preferable. The virtual components are put together on a silicon to build billion transistor LSI's, which can be compared to the present system implementation with pre-manufactured LSI components. In the year 2012, sensors / actutors can be integrated on a chip with 0.06µm 2G Si FET's with V TH & V DD control. Globally asynchronous LSI's with locally synchronous 10GHz clock will be implemented.