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A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR)
[chapter]
2010
Lecture Notes in Computer Science
In this paper we present a new transistor sizing methodology called Free Power Recovery (FPR) for low power circuit design. The objective of this methodology is to minimize the total power of a circuit by accounting for node switching activities and leakage duty cycles (LDC). The methodology has been incorporated into the EinsTuner circuit tuning tool. EinsTuner automates the tuning process using state-of-the-art non-linear optimization solvers and fast circuit simulators. Node switching
doi:10.1007/978-3-642-11802-9_35
fatcat:ekkgdoxb5zfqxkyhzis5ujwjae