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Writes Hurt: Lessons in Cache Design for Optane NVRAM
[article]
2022
arXiv
pre-print
Intel OptaneTM DC Persistent Memory resides on the memory bus and approaches DRAM in access latency. One avenue for its adoption is to employ it in place of persistent storage; another is to use it as a cheaper and denser extension of DRAM. In pursuit of the latter goal, we present the design of a volatile Optane NVRAM cache as a component in a storage engine underlying MongoDB. The primary innovation in our design is a new cache admission policy. We discover that on Optane NVRAM, known for its
arXiv:2205.14122v1
fatcat:ejdcwnqz5jfivgzw23f5pov2ze