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This paper introduces an algorithm for code placement in cache, and maps it to memory using a second algorithm. The target architecture is a multiprocessor system with 1 st level cache and a common main memory. These algorithms guarantee that as many instruction codewords as possible of the high priority tasks remain in cache all of the time so that other tasks do not overwrite them. This method improves the overall performance, and might result in cheaper systems if more powerful processorsdoi:10.1109/date.2001.915089 dblp:conf/date/Parameswaran01 fatcat:mwpe5bzsxff3rjgqfmmmlcr6em