Low-Power and High Performance Charging/Discharging Flip-Flop Design Using Pulse Generator

T Laxmi Bai
unpublished
In all digital designs we are using the storage elements. Basic storage elements are the flip-flops, in this paper we focus on the low power flip-flop using pulse triggered structure based on signal feed through scheme. The proposed pulse triggered flip-flop solves the long discharging path in conventional designs and this design works with the low power and it shows the high performance. The proposed pulse triggered flip-flop simulation results testing in CMOS 90nm technology. The power and
more » ... er delay product metrics in the performance edges are 22.7% and 29.7% respectively. INTRODUCTION: In Electronic designs, flip flops or latches are circuits which are used to store state information. The Flip flop circuit have the two stable states the circuit controls the two or more inputs and it's have the two or more outputs. In digital electronics the flip flops are used in computers, communications, and in portable devices. In present Technology most of flip-flops are working with the pipelining technique those are shift register, register file, first-in first-out. When estimating the total power consumption in clock system is high as 50% when the total power dividing and it goes to storage elements and clock distribution systems. In the overall system designs the flip-flops plays a virtual role in chip design and power consumption.
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