A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is
A Theoretical and Experimental Study of Stresses Responsible for the SOI Wafer Warpage
Silicon-on-insulator (SOI) wafers are nowadays being prominently used for the manufacture of new generation semiconductor devices. In order to maximize the device yield, the device industry is seeking SOI wafers that meet very stringent wafer specifications such as very low wafer bow and warp. An SOI wafer can undergo severe process-induced stresses during its manufacture leading to significant wafer bow and warp. The objective of this study is to understand and control the process-induceddoi:10.1149/1.2980292 fatcat:uzn444mzh5djlnbp5f5mjqyvc4