Design of Static Random Access Memory for Minimum Leakage using MTCMOS Technique

T. Esther Rani, CVR College of Engineering/ECE Department, Hyderabad, India, Dr. Rameshwar Rao, Hon'ble VC, JNT University, Hyderabad, India
2013 CVR Journal of Science & Technology  
This work involves implementation of 8x8 SRAM using Multi Threshold CMOS (MTCMOS) technique which reduces the leakage power by placing sleep transistor either between ground and pull-down network or V DD and pull up network. SRAM is designed using D-Latch. As reduction in the leakage power is more by using PMOS sleep transistor compared to NMOS sleep transistor, this design is implemented using MTCMOS technique with PMOS as sleep transistor. The design can be used where low power is the
more » ... ower is the constraint, as it offers 86% of power savings. Index Terms-SRAM, leakage power, MTCMOS, sleep transistor.
doi:10.32377/cvrjst0409 fatcat:fdywddivg5etjh4swhal7l23ry