Direct-mapped caches are a popular design choice for highperfortnsnce processors;unfortunately, direct-mapped cachessuffer systematic interference misses when more than one address maps into the sensecache set. This paper &scribes the design of column-ossociotive caches.which minhize the cofllcrs that arise in direct-mapped accesses by allowing conflicting addressesto dynamically choose alternate hashing functions, so that most of the cordiicting data canreside in the cache. At the sametime,

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... ever, the critical hit accesspath is unchanged. The key to implementing this schemeefficiently is the addition of a reho.dsM to eachcache se~which indicates whether that set stores data that is referenced by an alternate hashing timction. When multiple addressesmap into the samelocatioz theserehoshed locatwns are preferentially replaced. Using trace-driven simulations and en analytical model, we demonstrate that a column-associative cacheremoves virtually all interference missesfor large caches,without altering the critical hit accesstime.