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Column-associative Caches: A Technique For Reducing The Miss Rate Of Direct-mapped Caches
Proceedings of the 20th Annual International Symposium on Computer Architecture
Direct-mapped caches are a popular design choice for highperfortnsnce processors;unfortunately, direct-mapped cachessuffer systematic interference misses when more than one address maps into the sensecache set. This paper &scribes the design of column-ossociotive caches.which minhize the cofllcrs that arise in direct-mapped accesses by allowing conflicting addressesto dynamically choose alternate hashing functions, so that most of the cordiicting data canreside in the cache. At the sametime,doi:10.1109/isca.1993.698559 fatcat:2fqyoa4clfa3xijt7ni7zgjipi