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2010 Symposium on VLSI Circuits
This paper presents a 10-bit SAR ADC using a variable window function to reduce the unnecessary switching in DAC network. At 10-MS/s and 1-V supply, the ADC consumes only 98 μW and achieves an SNDR of 60.97 dB, resulting in an FOM of 11 fJ/Conversion-step. The prototype is fabricated in a 0.18μm CMOS technology.doi:10.1109/vlsic.2010.5560283 fatcat:2nhbfamz3rbjloc6vdufrrskf4