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Argus: Low-Cost, Comprehensive Error Detection in Simple Cores
2007
40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007)
We have developed Argus, a novel approach for providing low-cost, comprehensive error detection for simple cores. The key to Argus is that the operation of a von Neumann core consists of four fundamental tasks-control flow, dataflow, computation, and memory access-that can be checked separately. We prove that Argus can detect any error by observing whether any of these tasks are performed incorrectly. We describe a prototype implementation, Argus-1, based on a single-issue, 4-stage, in-order
doi:10.1109/micro.2007.18
dblp:conf/micro/MeixnerBS07
fatcat:g74a6zasczcw3jk4bmwwhrdouy