SCALING CHALLENGES FOR ADVANCED TRANSISTOR DESIGN
MAnil Kumar, YNSSai Kiran, U Jagadeesh, B Balaram, M.Durga Prakash
2017
International Journal of Advanced Research
We all are living in the digital world where we are going to use many devices which are fabricated using the CMOS technology. Due to the constraint design of the circuits and long routing schemes we are going to make the chip work a lot harder and it results in high power consumption. In order to reduce the power consumption we prefer to use certain techniques like usage of nano-materials instead of conventional Poly-Silicon. In this technique we are interested to modify certain conditions
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... results in generation of a new kind of technology which results in low power consumed, high speed circuits and devices which make a new way in the world of electronics. To reduce the power consumption of transistor i.e., when compared with ordinary transistor we has to reduce the power consumption as well as the power dissipation [6] . So we propose the application of nanomaterials which have high conductivity as well as lowpower dissipation which can be employed in design of Transistors of various technologies ( like 200nm., 100nm., 50nm. etc.,). Copy Right, IJAR, 2016,. All rights reserved. ...................................................................................................................... Introduction:- CMOS Technology is facing a lot of problems over the last 30 years .In conventional MOSFET we have certain electrostatic limitations like source to drain tunneling, carrier mobility, static leakages etc., [1] [5] .As the size of nanomaterials is very small we can use a more number of transistors on a single chip so that size of the chip is reduced its additional features which can relatively reduce the complex fabrication into simple steps of fabrication so device and circuit developers are using this type of devices and also can use different types of materials used to make these type of materials at low cost [2] . For an Ultra-small MOSFET we have to face several problems like high leakage current, high threshold voltage, high inter-connective capacitances, static leakages etc., all these problems can damage the MOSFET by reducing its performance [1] [5] . In the VLSI industry it is critically necessary to have a device which has low power dissipation and has high performance along with long time durability. In order to achieve such characteristic features in a real time operation scenario it will be a hard tenacious task [11] . More in the present modern world the electronic device must have low response time along with low power consumption provided the cost of the device must be in a nominal range [7] . Using a conventional MOSFET device can no longer sustain such a modern day challenge. So if we use Nano-Materials we can meet the modern day challenge [3][4] .
doi:10.21474/ijar01/4118
fatcat:wbk6veumwzcxvphmxw374il3ga