Dynamic Selection of Trace Signals for Post-Silicon Debug

Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Alon Adir
2013 2013 14th International Workshop on Microprocessor Test and Verification  
Post-silicon validation is one of the most expensive and complex tasks in today's System-on-Chip (SoC) design methodology. A major challenge in post-silicon debug is limited observability of the internal signals. Existing approaches address this issue by selecting a small set of useful signals. These signal states are stored in an on-chip trace buffer during execution. The applicability of existing methods is limited to a specific debug scenario where every component has equal importance all
more » ... time. In reality, a verification engineer would like to focus on a specific set of components (functional regions). Some regions can be ignored in a certain duration during execution due to clock gating and other considerations. Similarly, certain regions may be well verified datapath and less likely to have errors compared to other controlintensive regions. In this paper, we propose an efficient signal selection algorithm and a low-overhead trace controller design that would enable verification engineers to dynamically select a set of trace signals for improved error detection. Our experimental results using both ISCAS'89 benchmarks and Opencores circuits demonstrate that our approach can detect up to 3 times more errors compared to existing techniques.
doi:10.1109/mtv.2013.13 dblp:conf/mtv/BasuMPNA13 fatcat:e4mjrqvjmbajrcqhf76g4e3ody