A power and resolution adaptive flash analog-to-digital converter

Jincheol Yoo, Daegyu Lee, Kyusun Choi, Jongsoo Kim
Proceedings of the International Symposium on Low Power Electronics and Design  
A new power and resolution adaptive flash ADC, named PRA-ADC, is proposed. The PRA-ADC enables exponential power reduction with linear resolution reduction. Unused parallel voltage comparators are switched to standby mode. The voltage comparators consume only the leakage power during the standby mode. The PRA-ADC, capable of operating at 5-bit, 6-bit, 7-bit, and 8-bit precision, dissipates 69 mW at 5-bit and 435 mW at 8-bit. The PRA-ADC was designed and simulated with 0.18 µm CMOS technology.
more » ... CMOS technology. The PRA-ADC design is applicable to RF portable communication devices, allowing tighter management of power and efficiency.
doi:10.1109/lpe.2002.1029610 fatcat:svgikr5rkza77jqtku247vzv3y