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Implementation of fast HEVC encoder based on SIMD and data-level parallelism
2014
EURASIP Journal on Image and Video Processing
This paper presents several optimization algorithms for a High Efficiency Video Coding (HEVC) encoder based on single instruction multiple data (SIMD) operations and data-level parallelism. Based on the analysis of the computational complexity of HEVC encoder, we found that interpolation filter, cost function, and transform take around 68% of the total computation, on average. In this paper, several software optimization techniques, including frame-level interpolation filter and SIMD
doi:10.1186/1687-5281-2014-16
fatcat:76rnp6oshvf6bfugt6x25g2e5m