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Adaptive low-power address encoding techniques using self-organizing lists
2003
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
Off-chip bus transitions are a major source of power dissipation for embedded systems. In this paper, new adaptive encoding schemes are proposed that significantly reduce transition activity on data and multiplexed address buses. These adaptive techniques are based on self-organizing lists to achieve reduction in transition activity by exploiting the spatial and temporal locality of the addresses. Also the proposed techniques do not require any extra bit lines and have minimal delay overhead.
doi:10.1109/tvlsi.2003.814325
fatcat:ngsbchtlcrd5beiba2xcip55x4