Multiplier-Less Based Parallel-Pipelined FFT Architectures for Wireless Communication Applications

Wei Han, T. Arslan, A.T. Erdogan, M. Hasan
Proceedings. (ICASSP '05). IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005.  
This paper proposes two novel parallel-pipelined FFT architectures based on multiplier-less implementation targeting wireless communication applications, such as IEEE 802.11 wireless baseband chip and MC-CDMA receiver. The proposed parallelpipelined architectures have the advantages of high throughput and high power efficiency. The multiplier-less architecture uses shift and addition operations to realize complex multiplications. By combining a new commutator architecture, and a low power
more » ... fly with this approach, the resulting power and area savings are up to 31% and 20% respectively, for 64-point and 16-point FFTs, as compared to parallel-pipelined FFTs based on Booth coded Wallace tree multipliers.
doi:10.1109/icassp.2005.1416236 dblp:conf/icassp/HanAEH05 fatcat:klqpnt66tngixfjygenbtl5aey