On Basic Financial Decimal Operations on Binary Machines

Abhilasha Aswal, Ganesh Perumal, G.N. Srinivasa Prasanna Prasanna
<span title="">2012</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5jlmyrayyrdazh5awdlsoec77q" style="color: black;">IEEE transactions on computers</a> </i> &nbsp;
Financial transactions are specified in decimal arithmetic. Until the introduction of IEEE 754-2008, specialized software/ hardware routines were used to perform these transactions but it incurred a penalty on performance. In this paper, we show that if binary arithmetic is used to emulate decimal operations, then arbitrary error sequences can be generated by carefully chosen sequences of transactions which can lead to monotonically increasing/decreasing capitalization errors. In addition, we
more &raquo; ... scribe methods for correctly performing basic decimal operations, such as addition, subtraction, multiplication, and division, on binary machines, which are not conformant with IEEE 754-2008 decimal floating point standard (ISO/IEC/IEEE 60559:2011), at high speed.
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tc.2012.89">doi:10.1109/tc.2012.89</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ekhuprxg5vaunbzvlg6kdvqday">fatcat:ekhuprxg5vaunbzvlg6kdvqday</a> </span>
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