The zero-voltage-switching parallel-resonant DC link (PRDCL) inverter with minimized conduction loss

In-Hwan Oh
2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551)  
This paper presents a Parallel-Resonant DC Link (PRDCL) circuit for soft switching main power devices with a single auxiliary power device for low conduction loss in single or three-phase inverter and converter applications. The proposed resonant network with one auxiliary power device is activated whenever it is needed to change the status of power devices connected to a DC link. The proposed resonant network is designed to force the DC link voltage to drop to zero before any power devices in
more » ... he DC link are turned on. The auxiliary switch in the proposed resonant network is also turned on in a Zero-Voltage-Switching (ZVS) condition. Therefore, the switching losses caused in all power devices in a full-bridge converter and resonant circuit can be eifectively eliminated. In addition, there is no conduction loss in the auxiliary power device because the resonant circuit is not activated if there is no status change in the power devices connected in the DC link. Furthermore, the resonant swing voltage in the DC link is well restricted within a predefined voltage level so that the required voltage rating of all power devices in the DC link is nicely constrained. The detailed modes of operation and experimental results are provided to verify the operation. I . INTRODUCTION There is a growing interest in using a resonant DC link (RDCL) inverter for soft-switching technique to eliminate the switching losses caused in all power devices across a DC link. The basic concept of RDCL inverter is that a resonant tank or circuit in a D C link is used to make the DC link voltage zero and keep it at zero for a short switching transition time whenever power devices across the DC link need to have their status changed. A simple method of a resonant DC link inverter based on this basic concept is to use a free resonant circuit in the DC link by using passive components, L and C [3-51. However, the major problem with an RDCL inverter is the high voltage stress on the power devices because the voltage. swing by natural resonance can be two or three times higher than the supplied DC voltage, V,. To clamp this resonant voltage swing, an actively clamped resonant DC link (ACRDCL) inverter [1-2] was proposed. Since only one power device is used, the ACRDCL inverter is interesting to many high efficiency power conversions. Based on an ACRDCL inverter, the trials are being conducted Pulse-Width-Modulation (PWM). Specifically the Synchronized Kesonant DC Link (SRDCL) inverter [6] makes it possible to realize the continuous variation of the resonant output pulse width by controlling the turn ON time of S7 in Fig. 2 16) . However, a resonant current must flow S7 to extend output pulse width as shown in Fig. 2 [6] . This is not desirable for a high efficiency PWM operation. Another method for a PWM operation based on an ACRDCL inverter i:: to change the switch status to provide a current path to the three-phase output at [7]. The DC link voltage waveform does not change the basic operation of conventional ACRIICL inverter, but the three-phase output voltage waveform can be Pulse-Width-Modulated. However, the peak DC link voltage of an ACRDCL inverter is larger than Vdc and increase greatly when the resonant inductor current abruptly decreases as shown in the experimental result:; in Fig. 6 (191 and Fig. 3(a) [20]. To clamp this DC link voltage, the two types of Source Voltage Clamped Resonant Link (SVCRL) inverters employ just one power device as proposed in [IY-201. By using SVCRL inverters, the PWM or Pulse-Density-Modulation (PDM) is implemented as described in the paper. There are other approaches soft switching the power devices in the DC link [8][9]. The proposed methods are useful for making a commutation of power devices by every one resonant cycle. Therefore, it is very useful in a SCR inverter to eliminate a commutation circuit in each SCR leg. A sort of PDM technique [81 is proposed based on controlling the number of each resonant pulse depending on load current. Nevertheless, it is difficult to have a high resolution PWMed output. To have a high resolution of PWM output, a rest time control method of resonant cycle [IO] is proposed. However, the method needs three power devices in a resonant DC link stage. To make a resoniince in DC link, a Transformer-assisted Quasi-Resonant DC Link (TQRDCL) inverter is proposed in [10-14]. The DC link voltage is well clamped by properly designing the inductor size of Lr, and L,*. However, it needs at least three power devices to make a resonance in the DC link [IO-1 I]. A method for eliminating four power devices based on a TQRDCL inverter by using three-phase double full bridge inverter:; is proposed in [131. The four power devices in each three-phase full bridge converters are used for making a resonance in DC link as well as input and output conversion. An improved vzrsion of TQRDCL is proposed by employing just two power devices in [14]. The proposed method does not require any voltage or current sensing devices to ensure monant operation and is capable of PWM operation. New RDCL inverters without an assisting transformer are proposed in [15-161. However. the numbers 0-7803-8399-0/04/$20.00 02004 IEEE. 1718
doi:10.1109/pesc.2004.1355375 fatcat:q6cww2pes5cdddnwqjxjkyzyii