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Systematic Prevention of On-Core Timing Channels by Full Temporal Partitioning
[article]
2022
Microarchitectural timing channels enable unwanted information flow across security boundaries, violating fundamental security assumptions. They leverage timing variations of several state-holding microarchitectural components and have been demonstrated across instruction set architectures and hardware implementations. Analogously to memory protection, Ge et al. have proposed time protection for preventing information leakage via timing channels. They also showed that time protection calls for
doi:10.48550/arxiv.2202.12029
fatcat:tuktbtjawnavrmdnmwcetfpvtu