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Formal online methods for voltage/frequency control in multiple clock domain microprocessors
2004
Proceedings of the 11th international conference on Architectural support for programming languages and operating systems - ASPLOS-XI
Multiple Clock Domain (MCD) processors are a promising future alternative to today's fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor has the extra flexibility to adjust the voltage and frequency in each domain independently. Most existing DVFS approaches are profile-based offline schemes which are mainly suitable for applications whose execution characteristics are constrained and repeatable. While some work has been published about online DVFS
doi:10.1145/1024393.1024423
dblp:conf/asplos/WuJMC04
fatcat:mb7uqr5pz5gm3gl3ysz6c2nkza