Temperature Aware Scheduling for Embedded Processors

Ramkumar Jayaseelan, Tulika Mitra
2009 2009 22nd International Conference on VLSI Design  
Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and increased leakage current. In this paper, we propose a temperature aware scheduling technique in the context of embedded multi-tasking systems. We observe that there is a high variability in the thermal properties of different embedded applications. We design temperature-aware scheduling (TAS) scheme that exploits this
more » ... iability to maintain the system temperature below a desired level while satisfying a number of requirements such as throughput, fairness and real time constraints. Moreover, TAS enables exploration of the tradeoffs between throughput and fairness in temperature-constrained systems. Compared against standard schedulers with reactive hardware-level thermal management, TAS provides better throughput with negligible impact on fairness.
doi:10.1109/vlsi.design.2009.42 dblp:conf/vlsid/JayaseelanM09 fatcat:iw24snhkpbfpdij2s2zrloowqq