Proceedings. 42nd Design Automation Conference, 2005.
Along with the progress of VLSI technology, buffer insertion plays an increasingly critical role on affecting circuit design and performance. Traditional buffer insertion algorithms are mostly net based and therefore often result in sub-optimal delay or unnecessary buffer expense due to the lack of global view. In this paper, we propose a novel path based buffer insertion scheme which can overcome the weakness of the net based approaches. We also discuss some potential difficulties of the pathdoi:10.1109/dac.2005.193862 fatcat:c6hho4cqtfcldgb5anklyzclme