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To detect problematic circuit behaviour, such as potential hazards and deadlocks, in a reasonable amount of time a technique is required which would avoid exhaustive exploration of the state space of the system. Many of the existing methods rely on symbolic traversal of the state space, with the use of binary decision diagrams (BDDs) and associated software packages. This paper presents an alternative approach of using a special type of Petri nets to represent circuits. An algorithm fordoi:10.1109/async.2008.18 dblp:conf/async/PoliakovMRSY08 fatcat:vnsafsj5argkpgof2nm34xunye