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Channel Analysis for a 6.4 Gb s−1 DDR5 Data Buffer Receiver Front-End
2017
Advances in Radio Science
<p><strong>Abstract.</strong> In this contribution, the channel characteristic of the next generation DDR5-SDRAM architecture and possible approaches to overcome channel impairments are analysed. <br><br> Because modern enterprise server applications and networks demand higher memory bandwidth, throughput and capacity, the DDR5-SDRAM specification is currently under development as a follow-up of DDR4-SDRAM technology. In this specification, the data rate is doubled to DDR5-6400 per IO as
doi:10.5194/ars-15-157-2017
fatcat:u6y4q6h7ifchjfuh2zsxr6bntm