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Design of CMOS GHz Cellular Oscillator/Distributor Network with Supply Voltage and Ambient Temperature Insensitivities
GHz level ultra high speed clock generation and distribution for synchronization becomes a very important technical issue in chip and SoC applications. This paper proposes a novel way of CMOS GHz cellular oscillator/distributor networks with inherent insensitivities to supply-voltage and temperature fluctuations. Simulation results prove that maximun clock skew is limited within ~1% of a system clock period, given 3% of power supply and/or 5% of temperature fluctuations. This technique can thusdoi:10.14257/ijdta.2015.86.11 fatcat:nud6hvza6vecpi3jwpx4kxja3y