Design of CMOS GHz Cellular Oscillator/Distributor Network with Supply Voltage and Ambient Temperature Insensitivities

Won-yong Choi, Sung-jin Kim, Kang-in Heo, Gyu Moon
2015 unpublished
GHz level ultra high speed clock generation and distribution for synchronization becomes a very important technical issue in chip and SoC applications. This paper proposes a novel way of CMOS GHz cellular oscillator/distributor networks with inherent insensitivities to supply-voltage and temperature fluctuations. Simulation results prove that maximun clock skew is limited within ~1% of a system clock period, given 3% of power supply and/or 5% of temperature fluctuations. This technique can thus
more » ... be used for a low skew clock distribution in a few GHz speed VLSI and SoC systems design. The SPICE simulations are carried out with 3V, 0.5μm CMOS N-well process parameters to prove the novelity as well as the validity of the idea. Layout is also included for the future chip fabrication.
doi:10.14257/ijdta.2015.86.11 fatcat:nud6hvza6vecpi3jwpx4kxja3y