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A FPGA implementation of a DCT-based digital electrocardiographic signal compression device
Symposium on Integrated Circuits and Systems Design
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The use of portable Electrocardiographic (ECG) recording devices is directly dependent on the amount of physical memory available. Common recording techniques using enough bit encoding at a normal sampling rate can take as much as 80 Mbytes of storing space for a whole 24-hour period. This paper describes a simpl$ed implementation of a Discrete Cosine Transform (DCT) algorithm for digital signal compression to be implemented on a Field Programmable Gate Array (FPGA) device. Theoretic
doi:10.1109/sbcci.2001.953002
fatcat:qttettxrpjcx5bsn65ab2wpuza