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Filtering drowsy instruction cache to achieve better efficiency
2008
Proceedings of the 2008 ACM symposium on Applied computing - SAC '08
Leakage power in cache memories represents a sizable fraction of total power consumption, and many techniques have been proposed to reduce it. As a matter of fact, during a fixed period of time, only a small subset of cache lines is used. Previous techniques put unused lines, for example, to drowsy in order to save power. Our idea is to adaptively select the most used cache lines. In the case of instruction cache, we found that this can automatically achieved by coupling a tiny cache acting as
doi:10.1145/1363686.1364050
dblp:conf/sac/GiorgiB08
fatcat:5yqm7p24qbcpjb4ylpszhoqnv4