A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2011; you can also visit the original URL.
The file type is application/pdf
.
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration
2009
2009 Design, Automation & Test in Europe Conference & Exhibition
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and performance penalty intrinsic in gate-level reconfigurability. To reduce this overhead, coarse-grained reconfigurable arrays (CGRAs) are reconfigurable at the ALU level, but a successful design needs more than computational power-the main bottleneck usually being memory transfers. Just like the integration of hardwired
doi:10.1109/date.2009.5090723
dblp:conf/date/AnsaloniBP09
fatcat:twqcaz7vyzgqtnemo2ch2rqmqm