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In this project, we are designing a standard library cell with 90nm technology using GNU/Electric with MOCMOS technology. The library cell consists of 24 cells with each cell having the following views: Icon, Schematic and Layout. The standard library cell includes Basic Gates, Adder circuits, Flip-flops, Latches and Multiplexers. The parameters: Rise Time, Fall Time and Area for all these cells are calculated and listed in a table. Area of each cell in this library is compared with 180nm (CMOSdoi:10.1088/1742-6596/1362/1/012004 fatcat:zdd3gd56tzf4xpg3c576lgce5a