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Proceedings. 42nd Design Automation Conference, 2005.
We propose an embedded multiprocessor architecture and its associated thread-based programming model. Using a cycle-true simulation model of this architecture, we are able to estimate energy savings for a threaded C program. The savings are obtained by voltage-and frequency-scaling of the individual processors. We port a fingerprint minutiae detection application onto this architecture, and show the resulting performance on single-, dual-, and quad-processor configurations. The energy-scaleddoi:10.1109/dac.2005.193767 fatcat:ysdbhce73zadnpjqv5vyrbxo34