Computationally efficient locality-aware interconnection topology for multi-processor system-on-chip (MP-SoC)

Haroon-Ur-Rashid Khan, Feng Shi, WeiXing Ji, YuJin Gao, YiZhuo Wang, CaiXia Liu, Ning Deng, JiaXin Li
2010 Chinese Science Bulletin  
This paper evaluates the Triplet Based Architecture, TriBAa new idea in chip multiprocessor architectures and a class of Direct Interconnection Network (DIN). TriBA consists of a 2D grid of small, programmable processing units, each physically connected to its three neighbors so that advantageous features of group locality can be fully and efficiently utilized. Any communication model can be well characterized by locality properties and, any topology has its intrinsic, structural, locality
more » ... cteristics. We propose a new criterion in performance evaluation that is based on the concept of locality in an interconnection network, the "lower layer complete connect". Our proposed criterion depicts how completely a processing node is connected to all its neighbors. TriBA is compared with 2D Mesh and Binary Tree as static interconnection network. The comparison / evaluation is enumerated from three orthogonal view points, viz., computational speed, physical layout and cost. Our analysis concludes that TriBA is computationally efficient interconnection strategy that exploits group locality in processing nodes. multiprocessor, locality, interconnection network, VLSI layout, performance evaluation Citation: Khan H U R, Shi F, Ji W X, et al. Computationally efficient locality-aware interconnection topology for multi-processor system-on-chip (MP-SoC).
doi:10.1007/s11434-010-4118-z fatcat:anzn23bafnchjd2a7n64ynfqce