Performance Estimation of Embedded Software with Instruction Cache Modeling [chapter]

YAU-TSUN STEVEN LI, SHARAD MALIK, ANDREW WOLFE
2002 Readings in Hardware/Software Co-Design  
Embedded systems generally interact with the outside world. Thus, some real-time constraints may be imposed on the system design. Verification of these constraints requires computing a tight upper bound on the worst case execution time (WCET) of a hardware/software system. The problem of bounding WCET is particularly difficult on modern processors, which use cache-based memory systems that vary memory access time significantly. This must be accurately modeled in order to tightly bound WCET.
more » ... ting approaches either search all possible program paths, an intractable problem, or they use pessimistic assumptions to limit the search space. In this paper we present a far more effective and accurate method for modeling instruction cache activity and computing a tight bound on WCET. It is implemented in the program cinderella. We present some preliminary results of using this tool on sample embedded programs.
doi:10.1016/b978-155860702-6/50015-6 fatcat:2lxvjxgylrhvdiuwhuc3pgexh4