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High-level synthesis of recoverable VLSI microarchitectures
1999
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
Two algorithms that combine the operations of scheduling and recovery-point insertion for high-level synthesis of recoverable microarchitectures are presented. The first uses a prioritized cost function in which functional unit (FU) cost is minimized first and register cost second. The second algorithm minimizes a weighted sum of FU and register costs. Both algorithms are optimal according to their respective cost functions and require less than 10 min of central processing unit (CPU) time on
doi:10.1109/92.805747
fatcat:pnpj76ehtzcehna3yutb4svm2q