Utilizing Hardware Performance Counters to Model and Optimize the Energy and Performance of Large Scale Scientific Applications on Power-Aware Supercomputers

Xingfu Wu, Valerie Taylor
2016 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)  
Hardware performance counters are used as effective proxies to estimate power consumption and runtime. In this paper we present a performance counter-based power and performance modeling and optimization method, and use the method to model four metrics: runtime, system power, CPU power and memory power. The performance counters that compose the models are used to explore some counterguided optimizations with two large-scale scientific applications: an earthquake simulation and an aerospace
more » ... d an aerospace application. We demonstrate the use of the method using two power-aware supercomputers, Mira at Argonne National Laboratory and SystemG at Virginia Tech. The counter-guided optimizations result in a reduction in energy by an average of 18.28% on up to 32,768 cores on Mira and 11.28% on up to 128 cores on SystemG for the aerospace application. For the earthquake simulation, the average energy reductions achieved are 48.65% on up to 4,096 cores on Mira and 30.67% on up to 256 cores on SystemG. this paper, we use PAPI, which provides a standardized interface to hardware performance counters.
doi:10.1109/ipdpsw.2016.78 dblp:conf/ipps/WuT16 fatcat:qmlnku6wbbapzmd43vofvasegm