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Pipelined memory shared buffer for VLSI switches
1995
Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication - SIGCOMM '95
Switch chips are building blocks for computer and communication systems. Switches need internal buffering, because of output contention; shared buffering is known to perform better than multiple input queues or buffers, and the VLSI implementation of the former is not more expensive than the latter. We present a new org anization for a shared buffer with its associated switching and cut-through functions. It is simpler and smaller than wide or interleaved org anizations, and it is particularly
doi:10.1145/217382.217406
dblp:conf/sigcomm/KatevenisVE95
fatcat:ezwb2b642zhy7d5o3m3nhdavw4