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For multi-operand addition, several techniques, such as carry-save adders, Wallace, and Dadda structures based on counters and compressors have been proposed. This paper proposes a technique to accomplish multi-operand addition utilizing regular adder structures such as parallelprefix adders. One of the advantages of this technique is the elimination of dedicated adder units to perform three-input addition. Conventional prefix adders are modified to generate intermediate outputs called flagdoi:10.1109/iscas.2007.378197 dblp:conf/iscas/DaveOS07 fatcat:aaazajcp7rfdzdy6p3yrifyoqe