In this paper, a novel block channel equalization design for wireless communication over mobile radio channels with both inter-symbol interference (ISI) and Rayleigh fading is presented. The proposed design consists of a matched filter, a channel estimator, and a block decision feedback equalizer (BDFE). The channel estimator, which is based on a revised RLS algorithm, adopts a semi-blind approach. The estimated channel impulse response h(n) is used later in both matched filtering and the BDFE

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... pdate. The BDFE actually consists of a noise whitener and a maximum-likelihood block detector followed by a symbol detector. The filter coefficients of the BDFE are calculated subject to the Cholesky factorization and are updated once for each data block. Various wireless channel models, covering ISI and Rayleigh fading, have been simulated to demonstrate to effectiveness of the proposed equalization scheme. Based on this scheme, a novel systolic array design is next developed. The derived equalizer design features a highly parallel, hardware efficient and scalable design. Implementation results on a Xilinx XCV600 FPGA indicate an up-to-3-million symbols per second processing rate at 35MHz working frequency.