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Imprecise arithmetic for low power image processing
2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR)
Sometimes reducing the precision of a numerical processor, by introducing errors, can lead to significant performance (delay, area and power dissipation) improvements without compromising the overall quality of the processing. In this work, we show how to perform the two basic operations, addition and multiplication, in an imprecise manner by simplifying the hardware implementation. With the proposed "sloppy" operations, we obtain a reduction in delay, area and power dissipation, and the errordoi:10.1109/acssc.2012.6489164 dblp:conf/acssc/AlbicoccoCNPR12 fatcat:pax7zgvn7nbudh26i4gpxrvvzi