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Run-Time defect tolerance using JBits
2001
Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays - FPGA '01
The ability to tolerate defects in semiconductor devices has the potential for both increasing yields of devices being manufactured and making it economically feasible to manufacture even larger devices. While FPGA devices appear to be well suited to providing defect tolerance, practical application of existing research and techniques has been somewhat elusive. One barrier to acceptance is that existing defect tolerance techniques for FPGAs have tended to rely on either modifications to device
doi:10.1145/360276.360346
dblp:conf/fpga/SundararajanG01
fatcat:oytmm44ezbeqfoyly3sdh6vq7y