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Calibration method to reduce the error in logarithmic conversion with its circuit implementation
IET Circuits, Devices & Systems
Here, based on Mitchell's logarithmic conversion, the authors propose a fast calibration method using a fixed binary code with case judgement, which suppresses the conversion error. The authors developed a highly paralleled circuit serving the proposed calibration method. Differential cascade voltage switch logic (DCVSL) is used to work in both high-speed logic and adiabatic logic and trade-off between power dissipation and operation speed. In addition, a low-cost adiabatic clock generatordoi:10.1049/iet-cds.2017.0315 fatcat:hwaa5eg3izgrli4ihf7vunyqhy