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Synthesis of initializable asynchronous circuits
1996
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
We show that existing synthesis techniques may produce asynchronous circuits that are not initializable by gatelevel analysis tools even when the design is functionally initializable.Due to the absence of any initialization sequence, a fault simulator or test generator that assumes an unknown starting state will be completely ineffective for these circuits. In this paper, we show that proper consideration of initializability during the asynchronous circuit synthesis procedure can guarantee
doi:10.1109/92.502197
fatcat:gw2pnxjyqrfhtia5a3jpjxporm