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String pattern matching is a computationally expensive task, and when implemented in hardware, it can consume a large amount of resources for processing and storage. This paper presents a novel technique, based on a tree-based content addressable memory structure, for a pattern matching engine for use in a hardware-based network intrusion detection system. This technique involves hardware sharing at bit level in order to exploit powerful logic optimisations for multiple strings represented as adoi:10.1109/fpl.2005.1515762 dblp:conf/fpl/YusufL05 fatcat:f4frrpm7pfdxzfnwtqcy6n7ncq