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A power and resolution adaptive flash analog-to-digital converter
2002
Proceedings of the 2002 international symposium on Low power electronics and design - ISLPED '02
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A new power and resolution adaptive flash ADC, named PRA-ADC, is proposed. The PRA-ADC enables exponential power reduction with linear resolution reduction. Unused parallel voltage comparators are switched to standby mode. The voltage comparators consume only the leakage power during the standby mode. The PRA-ADC, capable of operating at 5-bit, 6-bit, 7-bit, and 8-bit precision, dissipates 69 mW at 5-bit and 435 mW at 8-bit. The PRA-ADC was designed and simulated with 0.18 µm CMOS technology.
doi:10.1145/566408.566468
dblp:conf/islped/YooLCK02
fatcat:e43h4y6a65bsbn55tsaepy6zse