Minimal period retiming under process variations

Jia Wang, Hai Zhou
2004 Proceedins of the 14th ACM Great Lakes symposium on VLSI - GLSVLSI '04  
With aggressive scaling down of feature sizes in VLSI fabrication, process variations have become a critical issue in designs. With process variations, timing optimization should consider the randomness introduced in delays. This paper considers how to retime a circuit under process variations. A statistical retiming problem is defined on the concept of a disutility function. Based on a new minimal period retiming algorithm, two algorithms are presented for the statistical retiming problem.
more » ... timing problem. Both theoretical and experimental results are given.
doi:10.1145/988952.988985 dblp:conf/glvlsi/WangZ04 fatcat:ygjsvh6tlbearaxfvarzz3y5xu