Power dissipation challenges in multicore floating-point units

Wei Liu, Alberto Nannarelli
2010 ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors  
With increased densities on chips and the growing popularity of multicore processors and general-purpose graphics processing units (GPGPUs) power dissipation and energy consumption pose a serious challenge in the design of system-onchips (SoCs) and a rise in costs for heat removal. In this work, we analyze the impact of power dissipation in floating-point (FP) units and we consider different alternatives in the implementation of FP-division that lead to substantial energy savings. We compare
more » ... implementation of division in a Fused Multiply-Add (FMA) unit based on the Newton-Raphson approximation algorithm to the implementation in a dedicated digit-recurrence unit. The results show a significant reduction of energy in a typical scientific application when the division digit-recurrence unit is used. In addition, we model the thermal behavior of the considered FP-units.
doi:10.1109/asap.2010.5540986 dblp:conf/asap/LiuN10 fatcat:h4uce6ppcfgx7cetndiywadkfq