A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2019; you can also visit the original URL.
The file type is
Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of onchip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of several emerging memory technologies, such as embedded DRAM, spin transfer torque RAM, resistive RAM, phase change RAM and domain wall memory. In this paper, we survey thedoi:10.1109/tpds.2014.2324563 fatcat:siuvjd3syjad5kfqkpy2mhojny