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The hardware implementation of an Artificial Neural Network (ANN) using field-programmable gate arrays (FPGA) is a research field that has attracted much interest and attention. With the developments made, the programmer is now forced to face various challenges, such as the need to master various complex hardware-software development platforms, hardware description languages and advanced ANN knowledge. Moreover, such an implementation is very time consuming. To address these challenges, thedoi:10.1109/tii.2016.2555936 fatcat:lf5idv3frnfxhdn7esovdrbuzy